There has been known a Built In Self Test (BIST) technique in which a pattern generation circuit and a determination circuit are included in an LSI circuit. The pattern generation circuit generates a predetermined test pattern in accordance with the logic of an LSI circuit. The determination circuit determines whether an LSI is passed or failed base on a result of operating the circuit by inputting a generated pattern to the LSI.
By using the BIST technique, it becomes possible to reduce the testing time in the shipping process of the LSI in a semiconductor manufacturing facility and also reduce the cost of the LSI.
References may be made to Japanese Laid-open Patent Publication Nos. 2004-212310 and 2007-064648.